Method of forming a semiconductor integrated circuit having isolation trenches,申请号EP19890108759-传众专利搜索

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发明名称	Method of forming a semiconductor integrated circuit having isolation trenches
摘要
申请公布号	EP0346625(B1)	申请公布日期	1996.11.27
申请号	EP19890108759	申请日期	1989.05.16
申请人	KABUSHIKI KAISHA TOSHIBA	发明人	HIRAKAWA, KENJI
分类号	H01L29/73;H01L21/02;H01L21/331;H01L21/76;H01L21/763;H01L21/8222;H01L27/06;H01L29/732;(IPC1-7):H01L21/76	主分类号	H01L29/73
代理机构		代理人
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