发明名称 Method for manufacturing semiconductor device
摘要 First through fourth wiring layers are formed on the surface of a silicon substrate, then a silicon oxide layer containing fluorine is deposited over the wiring layers and the silicon substrate, and then another silicon oxide layer containing no fluorine is deposited over the silicon oxide layer containing fluorine. Subsequently, the silicon oxide layer containing no fluorine is flattened by polishing it for a predetermined length of time when the silicon oxide layer containing no fluorine is polished, the silicon oxide layer containing fluorine serves as a stopper, since the polishing rate of the silicon oxide layer containing fluorine is lower than that of the silicon oxide layer containing no fluorine.
申请公布号 US5578531(A) 申请公布日期 1996.11.26
申请号 US19950547581 申请日期 1995.10.24
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KODERA, MASAKO;SHIGETA, ATSUSHI;YANO, HIROYUKI
分类号 H01L21/304;H01L21/3105;H01L21/316;H01L21/3205;H01L21/768;H01L23/522;(IPC1-7):H01L21/304 主分类号 H01L21/304
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