A leadless pad array chip carrier package is disclosed, employing a printed circuit board (22) having an array of solder pads (34) on the bottom side. A semiconductor device (24) is electrically wire bonded (49) and attached with conductive adhesive (47) to the metallization patterns (43, 45) of the printed circuit board (22). A protective plastic cover (26) is transfer molded about the semiconductor device (24) covering substantially all of the top side of the printed circuit board (22).
