发明名称 MULTIPLEXER AND CODER
摘要 <p>PURPOSE: To multiplex plural signal series of variable length codes in an optional sequence with a comparatively simple and small scale circuit configuration. CONSTITUTION: The multiplexer receives N-sets of inputs (N is an integer being 2 or over) in parallel comprising block processing data strings whose data size in the unit of blocks is made variable, multiplexes the data of the N-sets of data streams in the unit of blocks to convert them into a single data stream. Detection means 34-36 detect the size of data in the unit of blocks in each data stream respectively. The read of data out of buffer memories 31-33 is controlled in the decided read sequence on the detection result by the detection means.</p>
申请公布号 JPH08307864(A) 申请公布日期 1996.11.22
申请号 JP19950131100 申请日期 1995.05.01
申请人 SONY CORP 发明人 MATSUURA YOKO
分类号 H04N19/102;H03M7/30;H04N7/08;H04N7/081;H04N7/24;H04N19/00;H04N19/146;H04N19/196;H04N19/42;H04N19/423;H04N19/436;H04N19/91;H04Q11/04;(IPC1-7):H04N7/24 主分类号 H04N19/102
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