发明名称 MATCHING OF DIGITAL PATTERN USING ANALOG LOGIC
摘要 PROBLEM TO BE SOLVED: To solve a problem such as the complication of a circuit or the increase of a delay time due to the increase of the number of matching. SOLUTION: Quick, low power, and small-scaled approach for the matching of a digital pattern provides the comparison of an input pattern 218 with a reference pattern 219 by each bit for judging coincidence. In an execution example, incoincidence turns each current source 207-209 into a connected state. When currents from the incoincidence are beyond the maximum value (Imax) of a current sink, a pattern incoincidence output 213 is increased. The reference pattern and the number of bits which must be coincident can be easily programmed. This approach is especially effective in 'fuzzy' matching in which N bits among an M bit pattern must be coincident for recognizing that the patterns are coincident.
申请公布号 JPH08305780(A) 申请公布日期 1996.11.22
申请号 JP19960044483 申请日期 1996.03.01
申请人 AT & T CORP 发明人 GUREN EDOWAADO OFUOODO;JIEFUREI RII SONTAGU
分类号 G06G7/14;G06F7/02;H03K19/20;(IPC1-7):G06G7/14 主分类号 G06G7/14
代理机构 代理人
主权项
地址