U=shaped trench MOS semiconductor power transistor device

摘要

The semiconductor device includes n-type drain (104), p-type base (110), and n-type source (105) regions with corresponding drain (109), gate (106), and source (108) electrodes. The gate electrodes, insulated via insulator film and formed in a trench, extend from the main surface layer of the semiconductor within which transistor regions are formed and border base and source regions. The drain and source electrodes, on the main surface layer, cooperate with the gate electrode to form a UMOS. A region of low resistance (102) is formed under the drain region and a drain connection region extends from the main surface layer to the low resistance region. An insulation layer (111) on the main surface has drain and source openings for the corresponding drain and source electrodes. The drain, or source, electrodes comprise a planar conduction region provided on the insulation layer. The source, or drain, electrodes comprise of a planar conduction region (113). A further insulation layer (112) lies between the two planar conduction regions to provide a double layer connection structure. The source opening extends around the drain opening to surround the drain opening and the gate electrode is formed such that it surrounds the source opening.