| 摘要 |
<p>The subcarrier generator is connected between a digital encoder and a computer which generates a horizontal sync signal. The apparatus includes a frequency conversion circuit, pref. a phase locked loop, which generates a pixel clock signal from the computer horizontal sync signal. A clock device generates a reference clock signal and a deviation compensator processes this signal, along with the pixel clock signal to derive a subcarrier relative phase signal. The relative phase signal is then used to generate the television subcarrier signal. Pref. the deviation compensator includes a signal comparison circuit consisting of a timer which is activated for a period of time established by the pixel clock signal, and a counter which counts transition cycles in the reference clock signal. In addition, the counter is activated by control logic in order to provide selection signals to a multiplexer which reads the cycle count signal from the counter.</p> |
