| 摘要 |
<p>A high efficiency multiple power level amplifier circuit for reducing power comsumption during low power operations is disclosed. A plurality of power amplifier stages (34, 36) are cascaded to provide multiple levels of amplification. At least one power amplification stage (34) includes a signal switching network (35) to allow one or any combination of power amplifiers (36) to be switched out when lower power operations are desired. The switched out power amplifiers are biased such that substantially no current is drawn from the power source.</p> |
