发明名称 SELF ALIGNMENT WIRING METHOD
摘要 defining a gate electrode(102) and an impurity region on an active region defined on a semiconductor substrate(1); forming a first insulating film(103); patterning to expose the constant width of the gate electrode(102) at a constant interval after forming a first photoresist film(104) on the first insulating film(103); forming a second insulating film(105) and remaining only the second insulating film(105) between the first photoresist(104) patterns by etch back; removing a second photoresist film(106) on the second insualting film(105) between the gate electrodes(102) after forming the second photoresist film(106); forming a contact hole(107) by removing the first and the second insulating film(103,105); remaining a wiring metal between the remained second insulating film(105) by etch back of the wiring metal after removing the first and the second photoresist(104,106); and forming a metal wire(109) by removing the second insulating film(105).
申请公布号 KR960015487(B1) 申请公布日期 1996.11.14
申请号 KR19930013695 申请日期 1993.07.20
申请人 LG SEMICONDUCTOR CO.,LTD. 发明人 SHIN, PIL-SIK
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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