发明名称 |
Test generation of sequential circuits using software transformations |
摘要 |
A process for generating a test set for a sequential integrated circuit that includes performing a transformation on a software model of the circuit to provide a modified software model that should be more easily tested but that need not be functionally equivalent, and deriving a test set for the modified software model in conventional fashion. Thereafter, the derived test set is inverse mapped to derive a test set for the original sequential circuit. The transformation used essentially involves (1) the borrowing and/or returning registers at the primary inputs and/or primary outputs and (2) positioning the registers in the modified model as needed.
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申请公布号 |
US5574734(A) |
申请公布日期 |
1996.11.12 |
申请号 |
US19950539392 |
申请日期 |
1995.10.05 |
申请人 |
NEC USA, INC. |
发明人 |
BALAKRISHNAN, ARUN;CHAKRADHAR, SRIMAT T. |
分类号 |
G01R31/28;G01R31/3183;G06F11/22;G06F17/50;G11C29/00;G11C29/56;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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