发明名称 |
OUTPUT BUFFER CIRCUIT |
摘要 |
PURPOSE: To obtain an output buffer circuit for high speed transfer with low noise in which an output signal is not fully swung. CONSTITUTION: A 1st switch 101 and a 2nd switch 102 are arranged in series between a couple of power supply terminals, and an external output buffer 100 is configured by a voltage divider circuit 120 in which a coupling point between the 1st switch 101 and the 2nd switch 102 is connected to an output terminal X of an output circuit 110 and an external terminal Z as a voltage dividing point Y, the output circuit 110 and the external terminal Z. A 2nd control signalϕOUT used to turn on the 1st switch 101 and the 2nd switch 102 is fed to the voltage divider circuit 120 for a prescribed period just before a 1st control signal D allowing the output operation of the output circuit 110 is fed to allow the voltage division circuit 120 to set a potential of the voltage dividing point Y to a desired level before the output signal OUT is outputted.
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申请公布号 |
JPH08298451(A) |
申请公布日期 |
1996.11.12 |
申请号 |
JP19950125967 |
申请日期 |
1995.04.26 |
申请人 |
HITACHI LTD;HITACHI HOKKAI SEMICONDUCTOR LTD |
发明人 |
MATSUOKA KAZUNARI;SAITO YOSHIKAZU |
分类号 |
H03K19/0175;H03K19/0948;(IPC1-7):H03K19/017;H03K19/094 |
主分类号 |
H03K19/0175 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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