发明名称
摘要 <p>PURPOSE:To prevent plane short circuiting between pixel electrodes and their adjacent drain electrode by forming a protective film which is provided to a back channel of a TFT after formation of the electrode and an insulating film on an electrode wiring in a manufacturing method of an array of the TFT of a reverse staggered structure of embedded electrode type. CONSTITUTION:A non-doped a-Si film 13 and a first protective film 14 are patterned in the same pattern at a position where a TFT is provided on a gate electrode 11 through dryetching method so that they remain in an island shape. Then, an ITO transparent conductive film is formed through sputtering method and a pixel electrode 15 is formed by patterning it. A second protective insulating film 16 is formed, and a through hole 17 for the pixel electrode, a source contact hole 18, and a drain contact hole 19 are provided thereto. Dry etching is applied to an n<+> a-Si film 20 and a metal film 21 formed through sputtering method to form a wiring between a source electrode 22, a drain electrode 23 and a source electrode, and the through hole 17.</p>
申请公布号 JP2550692(B2) 申请公布日期 1996.11.06
申请号 JP19890032428 申请日期 1989.02.11
申请人 NIPPON ELECTRIC CO 发明人 NOGUCHI KESAO
分类号 H01L29/78;G02F1/136;G02F1/1368;H01L21/336;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L29/78
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