发明名称 Firmware selectable address location and size for cis byte and ability to choose between common memory mode and audio mode by using two external pins
摘要 An interface card has an interface logic block for interfacing a peripheral device with a computer host and for selecting either a common memory mode or an audio mode where the computer host can enable or disable a common memory read or write operation in the common memory mode. In the common memory mode, the computer host can choose to read card information service (CIS) bytes internally or externally. The interface logic block has, (a) a first external pin used either for a common memory chip select (CMCS) signal in the common memory mode or for an audio-in (AudIn) signal for the audio mode, (b) a second external pin used either for a common memory write (CMWR) signal in the common memory mode or for an audio-out (AudOut) signal in the audio mode, (c) a plurality of registers, (d) a logic circuit coupled to the registers, and (e) a microcontroller which can enable or disable the common memory write operation. The registers further include a configuration option register (COR), a card configuration and status register (CCSR), a pin replacement register organization (PRRO), a memory card address register, a memory card data register and an interface configuration register (ICR). Attribute memory range select bits in the ICR allow firmware selectable attribute memory locations of CIS bytes, the COR, CCSR and PRRO.
申请公布号 US5572683(A) 申请公布日期 1996.11.05
申请号 US19950492476 申请日期 1995.06.22
申请人 INTEL CORPORATION 发明人 EPOLITE, CARL J.;GLEY, MICHAEL;SATTERLUND, NELS
分类号 G06F13/12;(IPC1-7):G06F13/00;G06F12/02 主分类号 G06F13/12
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