发明名称 CIRCUIT AND METHOD FOR COMPUTER RESET CONTROL
摘要 PURPOSE: To provide a circuit and method for computer reset control which inhibit a CPU from being reset in its operation state wherein the CPU must not be reset and reset the CPU forcibly even in its runaway state need. CONSTITUTION: This circuit consists of an external circuit which sends a reset command out to a data line 16 as a serial signal, a shift register 13 which latches and transfers the pattern of the serial signal on the data line 16, a watchdog circuit 15 which monitor the change of the signal at the output port lid of a CPU 11a and outputs the result, and a comparator 14 which compares a pattern formed of a combination of a previous set fixed pattern and the output signal of the watchdog circuit 15 with the pattern of the serial signal transferred from the shift register 13 and generates a reset signal 17 for resetting a computer equipment 11 when they match each other.
申请公布号 JPH08292824(A) 申请公布日期 1996.11.05
申请号 JP19950095063 申请日期 1995.04.20
申请人 NEC CORP 发明人 YOSHIDA SHU
分类号 G06F11/30;G06F1/24;G06F11/00 主分类号 G06F11/30
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