发明名称 Semiconductor device having a multi-layer metallization structure
摘要 The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plus is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.
申请公布号 US5572072(A) 申请公布日期 1996.11.05
申请号 US19940341982 申请日期 1994.11.16
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, SANG-IN
分类号 H01L21/285;H01L21/441;H01L21/48;H01L21/768;H01L23/485;H01L23/522;H01L23/532;(IPC1-7):H01L29/43;H01L29/41 主分类号 H01L21/285
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