发明名称 Dynamic random access memory cell having a stacked capacitor
摘要 A DRAM device includes bit lines formed on an interlayer insulation film which covers gate electrodes on an insulation film on a semiconductor substrate. Each bit line is in contact with the corresponding source region formed in the substrate through an opening in the insulation films. Another insulation film is formed so as to cover the bit lines. A storage electrode is formed on the insulation film covering the bit line, and is in contact with a drain region in the substrate through another opening in the insulation films. The bit line has a vertical layer level lower than that of the storage electrode. The storage electrode is covered with a dielectric film, which is covered with an opposed electrode.
申请公布号 US5572053(A) 申请公布日期 1996.11.05
申请号 US19940291581 申请日期 1994.08.16
申请人 FUJITSU LIMITED 发明人 EMA, TAIJI
分类号 H01L21/8242;H01L27/108;(IPC1-7):H01L27/108;H01L29/94 主分类号 H01L21/8242
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