发明名称 DATA TRANSFER CIRCUIT AND LIQUID CRYSTAL DRIVING DEVICE USING THE CIRCUIT
摘要 PURPOSE: To provide a data transfer circuit in which power consumption of a clock line, that transmits a clock, is reduced and a liquid crystal driving device employing the above circuit. CONSTITUTION: A data transfer circuit 31 generates an inverted clock signal and a clock signal from the clock signal inputted from a clock input terminal 32 by inverter circuits 34 and 36 and the signals are outputted to an inverted clock line 35 and a clock line 37. Plural flip-flop circuits 38, 39 and 40 are connected between the both clock lines in parallel and in a cascading manner. Thus, the data from the terminal 33 are successively transferred between each flip-flop circuit. Then, between the lines 35 and 37, a transfer gate 42 is provided to make the both lines shortcircuited/non-shortcircuited conditions. While the gate 42 is charged and discharged on the lines 37 and 35, both lines are shortcircuited and electric charges are moved from one line to the other so that the charges required for a charge-up can be made one half. Hence, the power consumption can be reduced to one half, too.
申请公布号 JPH08292741(A) 申请公布日期 1996.11.05
申请号 JP19950120668 申请日期 1995.04.21
申请人 CASIO COMPUT CO LTD 发明人 MOROSAWA KATSUHIKO
分类号 G09G3/36;G11C19/00 主分类号 G09G3/36
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