发明名称 INTEGRATED CIRCUIT DEVICE PROVIDED WITH REFLECTION SUPPRESSION CIRCUIT FOR TRANSMISSION LINE
摘要 <p>PURPOSE: To reduce the power consumption and the occupied area of an integrated circuit device by suppressing the reflection caused by load of the signal that is transmitted through a transmission line by means of the signal that is inputted to the load at an output end part of the transmission line. CONSTITUTION: An integrated circuit device consists of a transmission line 2, a reflection suppression circuit 3, a voltage variation suppression circuit 5, a detection part 6, a delay circuit 7, a control part 8, etc. In such a constitution, the signals generated by a signal source 1 are inputted to the line 2 and transmitted through this line. The signals transmitted through the line 2 are inputted to the load 4 via the circuit 3. At the same time, the part 6 detects that the voltage has sharp variation at a level higher or lower than the power voltage at an output end part of the line 2. The circuit 7 delays the signal that is inputted at the termination of the line 2 and inputs this signal to the part 8. The part 8 controls the circuit 5 based on the delayed signal and then suppresses the voltage variation at the timing when the signals have sharp vibrations at the termination of the line 2. Therefore, the circuit 3 consists of an active circuit, so that the power is saved and the scale is reduced for the integrated circuit device.</p>
申请公布号 JPH08288824(A) 申请公布日期 1996.11.01
申请号 JP19950090474 申请日期 1995.04.17
申请人 FUJITSU LTD 发明人 ANDOU NARIYOSHI
分类号 H01L21/822;G06F1/04;H01L27/04;H03K19/0175;H04L25/02;(IPC1-7):H03K19/017 主分类号 H01L21/822
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