发明名称 READ CIRCUIT FOR MULTILEVEL NONVOLATILE MEMORY CELL DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a reading circuit which can reliably decode at a high speed information of a multi-level, nonvolatile memory cell device higher in storage capability than a conventional device. SOLUTION: The reading circuit for a multi-level, nonvolatile memory cell device comprising a subtraction coupling/control stage (MF) having a select line associated with a load (ML) and a feedback loop (INV) for stabilizing a voltage at a circuit node (F) of the select line, with respect to each of cells to be read. Connected to the circuit node (F) is a current replica circuit means controlled by the feedback loop (INV). The current replica circuit means include loads (M1, M2, M3) and an identical type of circuit elements (MC1, MC2, MC3) and also include an output interface circuit means (A, B, C) for connection with current comparison circuit means.</p>
申请公布号 JPH08287698(A) 申请公布日期 1996.11.01
申请号 JP19960076043 申请日期 1996.03.29
申请人 SGS THOMSON MICROELETTRONICA SPA 发明人 KURISUTEIAANO KARIGARO;BUINSENTSUO DANIERU;ROBERUTO GASUTARUDEI;ARESANDORO MANSUTORETSUTA;NIKORA TERETSUKO;GUIDO TOREERI
分类号 G11C17/00;G11C11/56;G11C16/02;G11C16/06;(IPC1-7):G11C16/06;G11C16/04 主分类号 G11C17/00
代理机构 代理人
主权项
地址