摘要 |
<p>PROBLEM TO BE SOLVED: To provide a reading circuit which can reliably decode at a high speed information of a multi-level, nonvolatile memory cell device higher in storage capability than a conventional device. SOLUTION: The reading circuit for a multi-level, nonvolatile memory cell device comprising a subtraction coupling/control stage (MF) having a select line associated with a load (ML) and a feedback loop (INV) for stabilizing a voltage at a circuit node (F) of the select line, with respect to each of cells to be read. Connected to the circuit node (F) is a current replica circuit means controlled by the feedback loop (INV). The current replica circuit means include loads (M1, M2, M3) and an identical type of circuit elements (MC1, MC2, MC3) and also include an output interface circuit means (A, B, C) for connection with current comparison circuit means.</p> |