发明名称 DATA COMPRESSION CIRCUIT
摘要 <p>PURPOSE: To attain a fast conversion/coding operation by dividing an image into a fixed number of blocks, repeating the operations of a multiplier in the addresses pointed by a pointer, and also securing the cascade connection of steps in a conversion/coding operation. CONSTITUTION: A block generation circuit 2 divides an image input 1 into the two-dimensional square blocks of (8×8) pixels, for example. A 1st conversion circuit 8 simultaneously receives the input of a block image 3 of the circuit 2 and a pointer 7 of a coefficient counter A6. In the same way, a 2nd conversion circuit 14 successively receives a pointer 13 as well as every line of output 9 of conversion 1, i.e., the output of the circuit 8. Thus the circuit 14 performs an operation of conversion 2. Each of elements of a square matrix of output 15 of conversion 2 of the circuit 14 is supplied to a quantization circuit 20, and the corresponding quantization output 21 is acquired.</p>
申请公布号 JPH08289303(A) 申请公布日期 1996.11.01
申请号 JP19950090759 申请日期 1995.04.17
申请人 MITSUBISHI ELECTRIC CORP 发明人 MINAKI MASAZUMI
分类号 B64G1/66;H03M7/30;H04N19/423;H04N19/436;H04N19/50;(IPC1-7):H04N7/32 主分类号 B64G1/66
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