发明名称 SEQUENTIAL ACCESSIBLE MEMORY DEVICE WITH HIGH CORRECTION CAPABILITY
摘要 PROBLEM TO BE SOLVED: To provide a sequentially accessible memory device which has such a high correcting capability that, when an a fault or error in rows or column, allows only the fault or error to be suitably corrected. SOLUTION: The memory device has a memory matrix (SM), a row select circuit (ZPTR) and column select circuits (SPTR, SCH), which circuit elements are connected as follows. That is, the memory device is arranged so that, in the presence of a fault or error in rows or columns, the device can correct the fault or error individually or can generate a small number of sequentially continual bits.
申请公布号 JPH08287699(A) 申请公布日期 1996.11.01
申请号 JP19960084133 申请日期 1996.04.05
申请人 SIEMENS AG 发明人 PAURUUBUERUNAA FUON BATSUSE;MIHIYAERU BORU;ROORANTO TEEBUESU;DORISU SHIYUMITSUTOORANTOZUIIDERU
分类号 G11C8/04;G06F11/10;G11C29/00;G11C29/42;(IPC1-7):G11C29/00 主分类号 G11C8/04
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