发明名称 METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT AND AUTOMATIC DESIGNING DEVICE
摘要 A program for automatically designing a logic circuit used for a method of designing a pass transistor circuit, by which the number of required transistors, delay time, power consumption, and chip area of the pass transistor circuit are reduced. The program includes the following steps: a) receiving an inputted logical function which defines the logical relation between the input and the output and inputted target specifications, b) drawing a binary decision graph from part of logical function received at (a), c) replacing the graph node formed at (b) with a pass transistor circuit, d) judging whether or not the simulation characteristics of the pass transistor circuit described in (c) meets the target specifications described in (a), and executing the following step when the judgment is "no", e) replacing part of the graph constituted by the procedure described in (b) with another graph, f) allocating newly prepared binary decision graph to the control input of the node of the replaced graph prepared at (e), and g) repeating steps (c) and (d) for the graph prepared at (f).
申请公布号 WO9634351(A1) 申请公布日期 1996.10.31
申请号 WO1996JP01104 申请日期 1996.04.24
申请人 HITACHI, LTD.;SASAKI, YASUHIKO;YANO, KAZUO;YAMASHITA, SHUNZO;SEKI, KOICHI 发明人 SASAKI, YASUHIKO;YANO, KAZUO;YAMASHITA, SHUNZO;SEKI, KOICHI
分类号 G06F17/50;H03K19/173;(IPC1-7):G06F17/50 主分类号 G06F17/50
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