发明名称 Fehlertolerantes Multicomputersystem
摘要 The object of the invention is to provide a fault-tolerant multicomputer system which is implemented in a completely decentralised manner, both avoids the customary common resources, which are particularly at risk of failure, between the modules (assemblies), such as RAM, bus system and clock, and interconnects computer peripherals in a fault-tolerant manner, and which has automatic fault detection and fault elimination (recovery) within the network right up to the input and output points to the peripherals. The multicomputer system is characterised in that in order to tolerate M faults in computer nodes, there is an arrangement of at least N = 2M + 1 computer nodes (k0...k8) which are interconnected in such a way that every computer node (k0...k8) can reach every other node via a plurality of partially or completely different paths, in that a distributed communications system permits the reliable exchange of data, and in that at least (2Q + 1) input and output modules (p0...p5) are arranged for the toleration of Q faults in the input and output modules, each of the input and output modules (p0...p5) being connected to a different one of the computer nodes (k0...k8). <IMAGE>
申请公布号 DE4332881(C2) 申请公布日期 1996.10.31
申请号 DE19934332881 申请日期 1993.09.21
申请人 CINDATEC INGENIEURTECHNISCHE DIENSTE GMBH COMPUTER-, INFORMATIONS- UND DATENTECHNIK, 09125 CHEMNITZ, DE 发明人 HELD, UWE, DR.-ING., 09127 CHEMNITZ, DE
分类号 G06F11/00;(IPC1-7):G06F11/16 主分类号 G06F11/00
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