| 摘要 |
PCT No. PCT/RU96/00088 Sec. 371 Date Oct. 14, 1997 Sec. 102(e) Date Oct. 14, 1997 PCT Filed Apr. 11, 1996 PCT Pub. No. WO96/32676 PCT Pub. Date Oct. 17, 1996The invention pertains to the field of computing technology and microelectronics and is useful in producing high-speed integrated circuits and sets of integrated circuits for digital processing of signals, for computing product sums, and for multiplication and addition processes. The inventive method essentially comprises sending a set of values of the electrical parameter of a signal into transmission channels, the number m of which corresponds to the unloading of terms. A computation system, to which corresponds the number n, determines the number of all possible combinations of the set of l/m values of the signal's electrical parameter, which values are sent into a transmission channel according to their weighting. The set of l/m values of the electrical parameter of the signal is sent through a divide-by-n circuit, while transmission is effected from the previous transmission channel to the input of the next transmission channel. The results are obtained at the output of the (m+l) transmission channels as a sequence of the set of values of the electrical parameter. The inventive device includes p blocks each comprising serially mounted first type members having a divide-by-n function, as well as second type members having a single memory discharge. |
