发明名称 Dynamische Speichereinrichtung mit wahlfreiem Zugriff
摘要 A semiconductor memory device comprises first sense amplifier driving lines ( l 2, l 1: Ln, Lp) and second sense amplifier driving lines ( l 31, l 41; l 32, l 42; SAN, SAP), the first sense amplifier driving lines ( l 2, l 1: Ln, Lp) are formed in a first wiring layer (W1) along the word line direction (WL), and the second sense amplifier driving lines ( l 31, l 41; l 32, l 42: SAN, SAP) are formed in a second wiring layer (W2) along the bit line direction (BL). Therefore, a current flowing in the each of the first sense amplifier driving lines ( l 2, l 1: Ln, Lp) becomes small, and the width of the the first sense amplifier driving lines ( l 2, l 1: Ln, Lp) becomes small, so that occupancy area of the semiconductor memory device can be decreased and a large scale integration can be realized. <IMAGE> <IMAGE>
申请公布号 DE69028625(D1) 申请公布日期 1996.10.24
申请号 DE1990628625 申请日期 1990.06.12
申请人 FUJITSU LTD., KAWASAKI, KANAGAWA, JP 发明人 KOHNO, TOHRU BEES MANSION 503, YOKOHAMA-SHI KANAGAWA 240, JP;EMA, TAIJI, TAKATSU-KU, KAWASAKI-SHI, KANAGAWA 213, JP
分类号 G11C7/06;G11C11/4091;H01L23/528;(IPC1-7):G11C7/06;G11C11/409 主分类号 G11C7/06
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