| 摘要 |
<p>A random access memory (200) is provided which includes input/output circuitry (205) and an array (202) of random access memory cells (201) arranged in rows and columns. Row decoder circuitry (206) is provided for selecting in response to a row address a row of cells in array (202) for access. Column control circuitry (207, 208) is included for controlling access to locations along the selected row, each location comprising at least one memory cell (201). The column control circuitry (207, 208) is operable to sequentially access a first plurality of locations along the selected row through input/output circuitry (205) and simultaneously access a second plurality of locations along the selected row. Auxiliary memory circuitry (209) is included for interfacing exchanges of data between the second plurality of locations and input/output circuitry (205), auxiliary memory circuitry (209) exchanging words with corresponding ones of the second plurality of locations in array (202) in parallel and with input/output circuitry (205) in serial.</p> |
