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发明名称
Method of and apparatus for designing an intergrated circuit and an intergrated circuit
摘要
申请公布号
GB9619096(D0)
申请公布日期
1996.10.23
申请号
GB19960019096
申请日期
1996.09.12
申请人
SHARP KABUSHIKI KAISHA
发明人
分类号
G06F9/45;G06F17/50
主分类号
G06F9/45
代理机构
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