发明名称 DIGITAL RADIO COMMUNICATION EQUIPMENT
摘要 <p>Digital radio communication equipment which can prevent the worsening of the error rate of demodulated signals due to the equalization of the output from a digital demodulator (6) and can always receive radio waves in the optimum state regardless of the existance of delayed waves. A bit error rate estimation circuit (8) estimates a bit error based on demodulated serial data (S3) outputted from the circuit (6) and outputs the estimated results to a control circuit (20) as an estimated bit error signal (S5). The circuit (20) selects either the demodulated serial data (S3) outputted from the circuit (6) or the demodulated serial data (S4) from an equalizer (7) by switching a selector (9) in accordance with a selector control signal (S6) based on the signal (S6) from the circuit (8) and an electric field intensity indicating signal (S2) from a reception circuit (3), and then outputs the selected data as demodulated data (S7). <IMAGE></p>
申请公布号 EP0739117(A1) 申请公布日期 1996.10.23
申请号 EP19940918541 申请日期 1994.06.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TATSUMI, KAORU;YAMAMOTO, KAZUO
分类号 H04B17/00;H04L1/00;H04L1/06;H04L1/20;H04L25/03;H04L27/22;H04L27/227;(IPC1-7):H04L27/22 主分类号 H04B17/00
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