发明名称 |
Process for aligning etch masks on an integrated circuit surface using electromagnetic energy |
摘要 |
Methods for alignment of stacked integrated circuit chips and the resultant three-dimensional semiconductor structures. A thickness control layer is deposited, as needed, on each integrated circuit chip. The thickness of the layer is determined by the thickness of the chip following a grind stage in the fabrication process. Complementary patterns are etched into the thickness control layer of each chip and into adjacent chips. Upon stacking the chips in a three dimensional structure, precise alignment is obtained for interconnect pads which are disposed on the edges of each integrated circuit chip. Dense bus and I/O networks can be thereby supported on a face of the resultant three-dimensional structure.
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申请公布号 |
US5567653(A) |
申请公布日期 |
1996.10.22 |
申请号 |
US19940306042 |
申请日期 |
1994.09.14 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BERTIN, CLAUDE L.;CRONIN, JOHN E.;PERLMAN, DAVID J. |
分类号 |
H01L25/00;H01L21/98;H01L23/52;H01L25/065;(IPC1-7):H01L21/027;H01L21/31 |
主分类号 |
H01L25/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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