| 摘要 |
A multi-bit data storage location 201 is formed at the face of a layer 502 of semiconductor of a first conductivity type. Storage location 201 includes a first transistor 210 having a source/drain region 308 of a second conductivity type formed in layer 502 and a gate 306 disposed insulatively adjacent a first channel area of layer 502 laterally adjacent source/drain region 308. A second transistor 210 is included having a gate 306 disposed insulatively adjacent a second channel area of layer 502. A first capacitor 211 is provided which includes a capacitor conductor 311 disposed insulatively adjacent a first capacitor area 509 of layer 502, first capacitor area 509 being disposed lateral to the first channel area of first transistor 210. A second capacitor 211 is provided which includes a capacitor conductor 211 disposed insulatively adjacent a second capacitor area 509 of layer 502, the second capacitor area 509 disposed lateral to the second channel area of second transistor 210.
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