| 摘要 |
PURPOSE: To speed up the drawing of new graphic accompanied by logical operation by repeatedly reading out and writing plural pixels from/to a frame buffer memory, for every color, continuously. CONSTITUTION: A graphic address generation part 16 continuously calculates addresses of the pixels constituting the graphic for an area that can be accessed in a page cycle of the VRAM of the frame buffer 2 and temporarily stores them in a graphic address storage part 15, and also outputs them to a source data calculation part 121. The source data calculation part 121 calculates source data corresponding to the addresses. A frame buffer memory control signal generation part generates a read and a write control signal for the frame buffer memory 2 on the basis of the addresses calculated by the graphic address generation part 16. A logical operation part 13 logically operate destination data continuously read out of the frame buffer memory 12 and the source data calculated by the source data computation part 121 to calculate write data, which are continuously written in the frame buffer memory 2. |
