发明名称 FIVE-TRANSISTOR MEMORY CELL PROVIDED WITH SHARED POWER-SUPPLY LINE
摘要 PROBLEM TO BE SOLVED: To reduce the number of transistors and bit lines per memory cell by forming constitution in which a static random access memory(SRAM) including five MOS transistors needs only two cells and three bit lines. SOLUTION: A first bit line 235 is connected on the opposite side to an SRAM cell 200 through a path transistor 225. A second bit line 265 is connected on the opposite side to an SRAM cell 210 through a path transistor 260. A third bit line 270 connects a power supply to the source terminals of p-channel transistors 205, 215, 240, 250. The gates of the path transistors 225, 260 are connected to a word line 230, and reading can be performed by the common basic line technique of a control circuit 275.
申请公布号 JPH08273364(A) 申请公布日期 1996.10.18
申请号 JP19960028711 申请日期 1996.01.24
申请人 SAIPURESU SEMICONDUCTOR CORP 发明人 PIITAA EICHI BUOSU;JIEFURII ERU RINDEN
分类号 G11C11/412;H01L21/8244;H01L27/11 主分类号 G11C11/412
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