| 摘要 |
<p>PURPOSE: To make the LSI package, where a cache controller and a main memory controller are incorporated in a processor, small-sized, low-cost, and high-performance. CONSTITUTION: This cache storage system is provided with at least a cache controller 4 and a main memory controller 5 which control the access from a processor 1 to a secondary cache 2 and a main memory 3, and the cache controller and the main memory controller are mounted on the same chip as the processor, and the processor chip and the secondary cache as well as the main memory are mutually connected by independent address signal lines 7a and 7b and a common data signal line 8, and a bidirectional driver 6 which separates the data wiring of the secondary cache from the load capacity of the data wiring of the main memory is arranged on the main memory side of the common data signal line.</p> |
