发明名称 WRITE PROTECTION METHOD OF INTEGRATED MEMORY CIRCUIT AND CORRESPONDING INTEGRATED MEMORY CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a writing protective method for an integrated memory circuit and an integrated memory circuit corresponding thereto in which the contents of a memory cell cannot be corrected or changed by providing a pseudo random generator and a counter in an integrated circuit. SOLUTION: This integrated circuit has a microprocessor uP, a read-only memory ROM and a nonvolatile read-write memory M. The microprocessor uP is adopted as an external interface and receives various signals of a logical voltage Vcc , an electric quantity Vss , a clock signal Clk , an integrated circuit reinitializing signal Rsi and two series input/output data signals IO1 and IO2 . Further, it has a pseudo random generator 8 and a counter 9, and the pseudo random generator 8 is supplied with a physical change quantity Ve, thereby generating a random value in response to a writing command. Also, the counter 9 subtracts the radom value to initialize a counting loop.</p>
申请公布号 JPH08273346(A) 申请公布日期 1996.10.18
申请号 JP19960092059 申请日期 1996.03.21
申请人 SGS THOMSON MICROELECTRON SA 发明人 ROORAN SUURUJIYAN;SHIRUBUII BUIDAARU
分类号 G11C17/00;G11C7/00;G11C16/02;G11C16/22;(IPC1-7):G11C7/00;G11C16/06 主分类号 G11C17/00
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