发明名称 MLSE EQUALIZER AND DEMODULATOR USING THE SAME
摘要 PURPOSE: To regenerate reception data and a burst reception signal without degrading the bit error rate characteristic of the reception signal by providing an MLSE equalizer capable of high-speed processing. CONSTITUTION: A replica generation part 1, an error calculation part 2, a branch metric part 3, an addition, comparison, and selection processing part 4, an impulse response operation part 2, and a path memory part 6 have independent computing elements, and an impulse response memory part 7 is inserted to simultaneously execute the write of the operation result from the impulse response operation part 5 and the read of the operation result from the impulse response operation part 5 to a replica generation part 1. A pass metric memory part is provided to simultaneously execute the read of the pass metric at the preceding time and the write of the selected pass metric at the present time selected by the addition, comparison, and selection processing part 4.
申请公布号 JPH08274693(A) 申请公布日期 1996.10.18
申请号 JP19950076964 申请日期 1995.03.31
申请人 FUJITSU LTD 发明人 TAKI YOSHIHIKO;NARITA TOSHIO;KOBAYASHI MITSUO;MINOWA RYOICHI;ONIYANAGI HIROYUKI;SAKAMOTO SHINGO;UNNO ISAMU;FURUKI TAKEETSU;SUZUKI KENJI;SUZUKI TOMOYUKI
分类号 H03H21/00;H03M13/23;H04B3/04;H04B7/005;H04L27/01;H04L27/22 主分类号 H03H21/00
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