发明名称 |
Digital phase difference measuring circuit |
摘要 |
The circuit determines the phase difference between an actual signal (I) and a reference signal (R). It uses a digital phase detector (15) comparing the actual signal with the differentiated reference signal (dR), to provide a binary signal (BI)representing their phase difference. The reference signal is fed to a delay chain (13), halted in an attained logic state when the differentiated reference signal reaches a defined logic state. It is evaluated by an evaluation stage (12) to provide a second binary word (B2), combined with the first binary signal. Thus it provides an output binary word (D) representing the phase difference.
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申请公布号 |
EP0737865(A2) |
申请公布日期 |
1996.10.16 |
申请号 |
EP19960104450 |
申请日期 |
1996.03.20 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
KRAMER, RONALF, DIPL.-ING. |
分类号 |
G01R25/00;H03L7/085;(IPC1-7):G01R25/08 |
主分类号 |
G01R25/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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