发明名称 Method and apparatus for selecting an optimal system bus clo ck in a highly scalable computer system
摘要 An oscillator output selector and complementary control circuitry are provided to a computer system. The oscillator output selector is used to select a series of clock pulses for usage as system bus clock. The control circuitry controls the selection being made by the oscillator output selector, in accordance to control inputs received. In one embodiment, the control circuitry receives system bus clock frequency preferences from the CPU boards as control inputs, and in response, the control circuitry causes the oscillator output selector to select the series of clock pulses having a frequency that is equal to or slower than the slowest preferred frequency. In an alternate embodiment, the control circuitry receives CPU types from the CPU boards as control inputs, and in response, the control circuitry causes the oscillator output selector to select a series of clock pulses having a frequency that will allow maximum total CPU clock frequency utilization.
申请公布号 AU5380796(A) 申请公布日期 1996.10.16
申请号 AU19960053807 申请日期 1996.03.28
申请人 INTEL CORPORATION 发明人 VIKTOR A. TYMCHENKO
分类号 G06F1/08 主分类号 G06F1/08
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