发明名称 FREQUENCY MULTIPLIER
摘要 The sampling frequency multiplier circuit in the digital pulse generator comprises: a phase generating section 201 for generating a pulse information of the digital pulse generator; a phase interpolating section 202 for generating an original phase and an interpolating phase by making it into a sine wave the phase information generated from the phase generating section 201; and a pulse generating section 203 for generating the sine wave according to an output of the phase interpolating section 202.
申请公布号 KR960014531(B1) 申请公布日期 1996.10.16
申请号 KR19940022502 申请日期 1994.09.07
申请人 SAMSUNG ELECTRONICS CO.,LTD. 发明人 SIM, DAE-YUN
分类号 H03B19/00;(IPC1-7):H03B19/00 主分类号 H03B19/00
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