| 摘要 |
Video Circuits (204) are arranged to convey sequential video signals, usually in the form of interlaced fields, with successive fields being separated by a field banking period. Data circuits (203) are arranged to convey randomly addressable image data and do not include blanking periods. Processing system (202) is arranged to convert between video signals and addressable image data to effect transfers between the video circuits (204) and the data circuits (203) at a rate equal to or greater than video rate. Data may be read from a digital video tape recorder and written to local storage in a format compatible with the addressed environment continuously at video rate. |
