| 摘要 |
<p>PURPOSE: To achieve high operational speed by driving a selected word line in a short time and to reduce a chip area in integration. CONSTITUTION: A semiconductor memory is provided with plural memory blocks classified into two groups, word lines provided in each memory block, plural row decoders selecting a word line in accordance with a row address signal, a driving signal generation circuit generating a driving signal for driving a word line, and a driving signal selecting circuit selecting and outputting a driving signal to a row decoder corresponding to any one pair of memory block. This driving signal selecting circuit is provided with a first MOS transistor 41 of which continuity is controlled in accordance with a row address signal /An, a second MOS transistor 42 of which continuity is controlled in accordance with a row address signal An, a third MOS transistor 43 of which continuity is controlled in accordance with a row address signal An, and a fourth MOS transistor 44 of which continuity is controlled in accordance with a row address signal /An.</p> |
