| 摘要 |
PURPOSE: To attain a high speed sampling by providing a clock phase difference generating means, an integration device, a differential sawtooth wave circuit and a filter circuit so as to provide an output of a phase difference between a reference frequency and an input signal. CONSTITUTION: A clock phase difference generating circuit 10 generates M kinds of clock signals CK0 -CKM-1 whose phase differs by 1/(Mfr) each from a reference clock signal CK with a frequency fv. Suppose that outputs of differential sawtooth wave circuits 200 -20M-1 are obtained synchronously with a timing of the signal CK, a sample value becomes definite for every virtual clock signal whose frequency is Mfd being a multiple of M of the signal CK. Then M-sets of adders 500 -0 50M-1 and a delay device 60 make high speed integration at a sampling frequency Mfr. Then the resulting signal is outputted by (M+1) sets of multipliers 700 -70M, M-sets of adders 800 -80M-1 and a multiplier 90 via the M-stages of moving mean filter circuits operated at a high speed by the sampling frequency Mfr. |
