| 摘要 |
PURPOSE: To reduce the chip size by simplifying the layout and fabrication process of a DRAM memory cell employing the field shield isolation structure. CONSTITUTION: The cell plate electrode 7 of a capacitor 12 constituting a DRAM memory cell along with am MOS transistor 11 is connected electrically with a shield gate electrode 8. A voltage causing no channel to be formed in a silicon substrate 1 under a shield gate electrode 8 is then applied between the silicon substrate 1 and the cell plate electrode 7 and the shield gate electrode 8. |
