摘要 |
PURPOSE: To enable miniaturizing and flattening of a high breakdown voltage MOS transistor, by forming a gate region by burying a poly silicon layer in a hole, via a gate oxide film formed in the bottom of the hole formed by penetrating an LPCOS oxide film. CONSTITUTION: As interlayer insulating films, an SiO2 film 19 1500Åthick and a BPSG film 20 6000Åthick are laminated on the whole surface of a substrate by an LPCVD method. After contact holes are formed on P<+> type drain diffusion layers 15, 17 and P<+> type source diffusion layers 16, 18, an aluminum layer is formed and etched, and Al electrodes are formed in the contact holes. In a high breakdown voltage MOS transistor manufactured in the above manner, a channel region can be formed right under the LOCOS oxide film 4, fine structure is realized, breakdown voltage of about 40V can be obtained between a source and a drain. Since a poly silicon layer is buried in the LOCOS oxide film, flattening is enabled.
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