发明名称 FM DEMODULATION CIRCUIT
摘要 PURPOSE: To suppress fluctuation in the FM demodulation characteristic by combining a load resistance voltage of a limiter with a reference voltage directly led out from a reference voltage source to obtain a limiter output to obtain a stable limiter output signal. CONSTITUTION: An output of a limiter final stage passes through Q21 -Q23 , Q24 -Q26 , and each of current mirror circuits Q27 and Q28 , and Q29 and Q30 , a signal current flows to load resistors RL11 , RL12 connected to a reference voltage source VR and the current appears at terminals 10, 11. The output provides a potential of±I1×RL11 or a potential of±I1×RL12 with respect to the terminal 12 from which a reference voltage source VR is directly outputted. A signal potential of the terminals 10, 11 with respect to a potential of the terminal 12 is made stable. The amplitude of the terminals 10, 11 is changed while keeping the vertical symmetry around the potential of the terminal 12 by changing the I1 . Thus, the demodulation sensitivity of the FM demodulator and the maximum demodulation frequency are changed.
申请公布号 JPH08265045(A) 申请公布日期 1996.10.11
申请号 JP19950060435 申请日期 1995.03.20
申请人 MITSUBISHI ELECTRIC CORP 发明人 IDETA HIROSHI
分类号 H03D3/06;(IPC1-7):H03D3/06 主分类号 H03D3/06
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