发明名称 CLIPPING AND ROUNDING CIRCUIT FOR 2'S COMPLIMENT FORMAT DATA
摘要 a sign bit detecting means(4) judging the sign by detecting the most significant bit of the inputted data of 2's complement type; a carry generating means(5) generating a carry when the detected value is positive by receiving the LSB-1 bit; an adding means(6) performing +1 adding to the inputted data and supplying to an output switching means(8) when there is an output of the carry generating means, and supplying the overflow to an overflow detecting means(7); an overflow detecting means(7) detecting overflow by scanning the top bit of the inputted data; and an output switching means(8) outputting the output of the adding means or the set +/- maximum value.
申请公布号 KR960013762(B1) 申请公布日期 1996.10.10
申请号 KR19940000360 申请日期 1994.01.11
申请人 LG ELECTRONICS CO.,LTD. 发明人 SONN, HYO-HUN
分类号 G06F5/06;(IPC1-7):G06F5/06 主分类号 G06F5/06
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