| 摘要 |
A read-only memory includes an instruction section, an address section, and a qualifier section, all of which are addressed simultaneously by a single memory address code and thereafter selectively enabled. A plurality of instructions from the instruction section simultaneously operate on data contained in different storage registers. Qualifier logic compares the data in the storage registers with predetermined conditions addressed in the qualifier section. Different control codes are produced by the qualifier logic and qualifier section of the memory. Main control logic responds to the control codes and gates signals from the instruction and address sections. Instructions from the instruction section may be selectively inhibited.
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