ARRANGEMENT AND METHOD AT AN INTEGRATED CIRCUIT

摘要

The present invention concerns an arrangement and process for mutually synchronizing application-specific integrated circuits (ASIC) which are arranged to communicate with one another. The arrangement according to the invention enables an activating pulse edge to be determined in a common clock signal to an edge-triggered integrated circuit which communicates with at least one further integrated circuit. Each of the communicating integrated circuits receives the common clock signal. The circuits also receive frequency data in the form of a clock signal which is adapted to the respective circuit and which is used for determining in the respective circuit the activating pulse edge in the common clock signal.