发明名称 Method for making one stage of an integrated circuit
摘要 <p>Method for making one stage of an integrated circuit formed of a dielectric layer (1) shrouding interconnection lines (5) and connection points (4) which connect these lines (5) to conductive portions (6) on the opposite side of the dielectric layer (1). The method consists in forming the whole of the dielectric layer (1) during the same step, in then successively etching cavities at the sites of the connection points and of the interconnection lines by means of two masks laid successively, and finally in filling these cavities in a single step with conductive material in order to simultaneously form the connection points (4) and the interconnection lines (5). Manufacture is therefore simple and is accompanied by good flatness of the finished product. <IMAGE></p>
申请公布号 EP0463956(B1) 申请公布日期 1996.10.02
申请号 EP19910401709 申请日期 1991.06.25
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE 发明人 HEITZMANN, MICHEL;LAJZEROWICZ, JEAN;LAPORTE, PHILIPPE
分类号 H01L21/60;H01L21/3205;H01L21/768;H01L23/528;(IPC1-7):H01L21/768 主分类号 H01L21/60
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