A coding unit encodes the data for recording. The coding unit contains a first section to introduce resynchronisation bytes between two data blocks in a data field, where the data is in a predetermined modulation code producing DC components. This is converted into a pulse width modulation (PWM) format. When a clock slip occurs within the data field, a second section calculates a digital sum for a datablock, as the difference between the sum of logic 'I's and logic 'O's in the PWM data. A third section controls the first section, so that resynchronisation bytes with values to minimise the digital sum are introduced into the data block.