发明名称 |
Parallel processing type processor system with trap and stall control functions |
摘要 |
A parallel processing type processor system with trap and stall control functions capable of operating without increasing the cycle time, such that the lowering of the clock frequency in the system can be prevented. In the system, the processor units are controlled such that when an exception is caused in an execution of at least one of the instructions supplied to the processor units concurrently, the processings of all of the instructions supplied to the processor units concurrently are aborted. In addition, the processings of the instructions supplied to the processor units concurrently are stalled when it is not possible to deny a possibility for an occurrence of an exception in the execution of the instructions supplied to the processor units concurrently.
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申请公布号 |
US5561774(A) |
申请公布日期 |
1996.10.01 |
申请号 |
US19940291582 |
申请日期 |
1994.08.16 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
AIKAWA, TAKESHI;SAITO, MITSUO;MINAGAWA, KENJI;TAKEDA, KENJI |
分类号 |
G06F9/38;(IPC1-7):G06F9/46 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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